| Name | Last modified | Size | Description | |
|---|---|---|---|---|
| Parent Directory | - | |||
| tests/ | 2025-01-20 01:51 | - | ||
| xilinx-core.h | 2025-01-20 01:51 | 690 | ||
| altera-pr-ip-core-pl..> | 2025-01-20 01:51 | 1.2K | ||
| dfl-fme.h | 2025-01-20 01:51 | 1.3K | ||
| lattice-sysconfig.h | 2025-01-20 01:51 | 1.4K | ||
| xilinx-spi.c | 2025-01-20 01:51 | 1.8K | ||
| versal-fpga.c | 2025-01-20 01:51 | 2.0K | ||
| dfl-fme-pr.h | 2025-01-20 01:51 | 2.0K | ||
| dfl-fme-region.c | 2025-01-20 01:51 | 2.1K | ||
| Makefile | 2025-01-20 01:51 | 2.3K | ||
| dfl-fme-br.c | 2025-01-20 01:51 | 2.4K | ||
| xilinx-selectmap.c | 2025-01-20 01:51 | 2.6K | ||
| zynqmp-fpga.c | 2025-01-20 01:51 | 3.2K | ||
| dfl-afu.h | 2025-01-20 01:51 | 3.2K | ||
| ts73xx-fpga.c | 2025-01-20 01:51 | 3.4K | ||
| lattice-sysconfig-spi.c | 2025-01-20 01:51 | 3.8K | ||
| dfl-afu-region.c | 2025-01-20 01:51 | 4.1K | ||
| xilinx-pr-decoupler.c | 2025-01-20 01:51 | 4.1K | ||
| altera-pr-ip-core.c | 2025-01-20 01:51 | 4.7K | ||
| altera-fpga2sdram.c | 2025-01-20 01:51 | 4.8K | ||
| ice40-spi.c | 2025-01-20 01:51 | 5.3K | ||
| xilinx-core.c | 2025-01-20 01:51 | 5.5K | ||
| altera-hps2fpga.c | 2025-01-20 01:51 | 5.6K | ||
| dfl-afu-error.c | 2025-01-20 01:51 | 6.2K | ||
| altera-freeze-bridge.c | 2025-01-20 01:51 | 6.7K | ||
| altera-ps-spi.c | 2025-01-20 01:51 | 7.4K | ||
| fpga-region.c | 2025-01-20 01:51 | 7.6K | ||
| lattice-sysconfig.c | 2025-01-20 01:51 | 8.7K | ||
| dfl-fme-mgr.c | 2025-01-20 01:51 | 8.8K | ||
| Kconfig | 2025-01-20 01:51 | 9.3K | ||
| machxo2-spi.c | 2025-01-20 01:51 | 9.3K | ||
| dfl-fme-error.c | 2025-01-20 01:51 | 9.6K | ||
| microchip-spi.c | 2025-01-20 01:51 | 9.7K | ||
| dfl-afu-dma-region.c | 2025-01-20 01:51 | 10K | ||
| fpga-bridge.c | 2025-01-20 01:51 | 10K | ||
| dfl-fme-pr.c | 2025-01-20 01:51 | 11K | ||
| dfl-pci.c | 2025-01-20 01:51 | 12K | ||
| stratix10-soc.c | 2025-01-20 01:51 | 12K | ||
| of-fpga-region.c | 2025-01-20 01:51 | 12K | ||
| socfpga-a10.c | 2025-01-20 01:51 | 15K | ||
| socfpga.c | 2025-01-20 01:51 | 17K | ||
| zynq-fpga.c | 2025-01-20 01:51 | 17K | ||
| dfl.h | 2025-01-20 01:51 | 17K | ||
| dfl-n3000-nios.c | 2025-01-20 01:51 | 18K | ||
| dfl-fme-main.c | 2025-01-20 01:51 | 19K | ||
| altera-cvp.c | 2025-01-20 01:51 | 19K | ||
| intel-m10-bmc-sec-up..> | 2025-01-20 01:51 | 20K | ||
| dfl-afu-main.c | 2025-01-20 01:51 | 23K | ||
| fpga-mgr.c | 2025-01-20 01:51 | 26K | ||
| dfl-fme-perf.c | 2025-01-20 01:51 | 30K | ||
| dfl.c | 2025-01-20 01:51 | 50K | ||